Electronic apparatus



Sept. 19, 1961 K. E. scHRElNER ELECTRONIC APPARATUS Filed July 15, 1957l14 Sheets-Sheet 1 ATTORNEY Sept. 19, 1961 K. E. scHRElNER ELECTRONICAPPARATUS 14 Sheets-Sheet 2 Filed July l5, 1957 ATTORNEY Sept. 19, 1961Filed July 1 K. I:. scHREINER 3,000,564

ELECTRONIC APPARATUS 5, 1957 14 Sheets-Sheet 3 POWER INPUT OR A APPLIEDVOLTAGE (FUNDAMENTAL) Mmm AIvIPLITUDES ACTUALLY IE''IIEE DEPLACEMENTVERY MUCH GREATER THAN 1 INDICATED l CONTROL INPUT OF PHASE I OR 9 BAPPLIED YOLTAGE ISUEHARII/IONICI SUDHARMONIC OUTPUT OP PHASEI OR IGIvEsO, CHARGE RESPONSEISUDHARMONICI PHASE DIsPLACEIvIENT ANGLE x I I CONTROLINPUT OP PHASE 2 OR C APPLIED |VOLTAGE ISUBHARII/IONICI e OR M L/ I VSUDHARIVIONIC OUTPUT OP PHASE 2 OR GIVES O, CHARGE RESPOASEISUB-HARMONICI INVENToR. TIME KENNETH E. SCHREINER Y PIG. FIG. FIGD s D IEFIGIC WW ATTORNEY Sept. 19, 1961 Filed July l5, 1957 K, E. scHRElNER3,000,564

ELECTRONIC APPARATUS 14 Sheets-Sheet 4 \IN/VENTOR.

v KENNETH E. SCHREINER FIG.1E

ATTORNEY 14 Sheets-Sheet 5 K. E. scHRr-:lNr-:Rl

ELECTRONIC APPARATUS Sept. 19, 1961 Filed July 15, 1957 Sept 19, 1961 K.E. scHRElNER ELECTRONIC APPARATUS Filed July l5, 1957 14 Sheets-Sheet 6Zorromjmw ..WIIFI llllllnllllll- Sept. 19, 1961 K, E. scHRr-:INER3,000,564

ELECTRONIC APPARATUS Filed July 15, 1957 14 Sheets-Sheet '7 om@ 09 o om|r||| LS? wm uw.. @NN Q Q w w Nw n; R l f VIII @NN 6o. C250 mim/1E; www

Uhm www NX9 wref@ FL TIL o E W III-IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII Ilrllllllllllll- Sept. 19, 1961 K.E. scHRElNr-:R

ELECTRONIC APPARATUS Filed July l5, 1957 14 Sheets-Sheet 8 K. E.scHRElNER 3,000,564

ELECTRONIC APPARATUS 14 Sheets-Sheet 9 Sept. 19, 1961 Filed July l5,1957 Sept 19, 1961 K. E. scI-IREINER 3,000,564

ELECTRONIC APPARATUS Filed Jul" l5' 1957 14 sheets-sheet 1o (EXAMPLE)CONTROL .5 MEG. CONTROL INPUT CONTROL INPUT POWER INPUT SUBHARMONICPOWER 5G P GENERATOR T* 1 MEG POWER i 'NPUT I CINONLINEARI /I I L[IIIQPBLE Tas I 4 RIOEIANT f/ J LINEAR-:I

CIRCUIT OUTPUT LOW RESISTANCE O FIG.4A T

INVERTER (ELECTRONIC AMPLIFIER, HALF-WAVE LENGTH @El COAxIAL CABLE, WAVEGUIDE ETC.)

FIC-3.5

MAJORITY CIRCUIT ANO CIRCUIT SG SG 1 3 (IPOWER POWER INPUT INPUT FIG. 6FSG 8 OR CIRCUIT SGv POWER INPUT Fl G. 7 INVENTOR KENNETH E. SCHREINERM007 @e @uw ATTORNEY Sept. 19, 1961 K. E. scHREINER 3,000,564

ELECTRONIC APPARATUS Filed July l5, 195'7 l 14 Sheets-Sheet 11 INPUTBINARY ADDER l TERMINAI-S I 0 An l 0 Bn I O Cn I o M 102A l 1j@ I A EI CA ako 1v1 B\ C I RRR RRRB RRR 2 AND MAJORITY 0R CIRCUIT fgIRCUIT/CIRCUIT 101 102 se Ioo se SG lP iR iR I I l PI T If l B A I R R; R I fAND AND I CIRCUIT 103 CIRCUIT 104 I SG Tp Tp I 4 l Pnw T A B i $12/ 1 OpI R R R I 0R RCUIT 105 Pm SG T- -O-T- P i S13/1 CARRY v 'Y I V NTOR "D"1N E KENNETH E. SCHREINER FlG. 9 BY k// @ww ATTORNEY Sept 19, 1961 K. E.scHRl-:INER 3,000,564

v v ELECTRONIC APPARATUS f Filed July l5, 1957 14 Sheets-Sheet 12 RM, A@An l RAM C O`Cn SG g AfP fP su \MAJOR|TY CiRCUlT 201 1 INV f R/a R R R?\AND-0R clRcUlT 202 CARRY SUM u Dn xlEll BINARY ADDER FIG.1O

FUNDAMENTAL (POWER) FREQUENCY wAvEFoRM P1 ,Pleoc TIME SUBHARNIONICFREQUENCY MwMM-wwwwm-MMM \A A A Al WAVEFORM B Mmmm B B B B gg'gmwwmwwmw'FIGJOF C1 C2 C3 C4 T 20-L--22 i-23 .|24 `l i T2 T3 T4 WAVEFORMDARRYMmwmwM/Mmw-Ammwwwwwmw D4 e D2 e D3 e D4 G WAVEFORM C (SUM)*MAMMA-Awww FIGOH E A E E3 E Sept. 19, 1961 3,000,564

K. E. SCHREINER ELECTRONIC APPARATUS Filed July 15, 1957 14 Sheets-Sheet13 FUNDAMENTAL POWER FREQUENCY FIG.9A

F|G.9B WAVEFORM P"\/\/\/\/-|/\/\/\/\AAr-\/V\/\/\/\/|A/\/V\/\/\/\/\/\/\/\/\/\ F|G.9C

FIG.9D

TIME WAVEFORMMWMMNMMNWWMMMNMMMNWMMMNWWMNWNMMMMWNWMMWMWWNWT 90 '91T GOeTl' WAVEFORMA MAMA-AMM/VWVW F1691: SU A1 en A2 90 A3 @n A4 WAVEFORM BWMM-MAMMAMMMNMM-MMMMWNNAPMWWMA-AMWMM 90 BT OO B2 Gn B3 91T B4 WAVEFORM CMWC-WMMHMNWWMM-WNMMMMMNw-MANMNN 200| L 21C2 22C?, l 2304 I Ts |T2 lT3 9T4 9 lT5 WAVEFOR'V D MMM-Hmmm D1 GTT D2 90 D3 QTY D4 en WAVEFORM EAWAMMNMM-AMNVWNAMM-WMMMMMMM-MNWMMN E1 P E2 M E3 E4 PESPECTTVE p"RESPECTH/E SEE NOTE4 AMPLITUDESOF P" AMPM-TUBES 0F C m D P E PHASE ANGLEOF SUBHARMONIC MAY BE EITHER 9 OR OT, EXCEPT FOR M, WHOSE SUBHARMONICFREQUENCY FUNDAMENTAL FREQUENCY PHASE |S en. PHASE ANGLES oF 13,8 E,DEPEND UPON PHASES OF AB& C PHASE ANGLES OF DZSE2 OEPEND UPON PHASES OFA2,B2,SC2,ETC.

l NOTE 1; 1 2 5 4 SUBHARMONTC FREQUENCIES CHART |LLUSTPATES TYP| A O TrO Tr RESPECTH/E HAVE T|MEPHASE CAL EXAMPLES OF PHASES "T B Tr U O TTRELAT|ONSH|P OF @OOPSTr (O ORTTTFOR SISNALS A,B, WITH RESPECT TOFUNDAMEN- CTDET WITH SAME SUBS C o O TT 1T TALTPOWER) FREQUENCY.

FIG D O TT O Tr INVENTOR E TT 0 TT TT KENNETH E. SCHREINER TTORNEY Sept.19, .1961 K. E. scHRElNER 3,000,564

ELECTRONIC APPARATUS FledJuly 15, 1957 14 Sheets-Sheet 14 TERNARY POWERINPUT CONTROL INPUTS\` /T' [W3-TT l V l l C l I SUBHARMONIO OUTPUTS @1112 @11 T POWER CONTROL INPUT OF PHASE 2(9TT) W95) SUBHARMONIC OUTPUTPHASE 2 E SUBHARMONIC OUTPUT PHASE4 V l 1N VENTOR V KENNETH E. SCHREINERBY n.12 Fac-3.125 Aal/,gnam

ATTORNEY nited States Patent 3,000,564 ELECTRONIC APPARATUS Kenneth E.Schreiner, Harrington Park, NJ., assigner to International BusinessMachines Corporation, New York, NX., a corporation of New York FiledJuly '15, 1957, Ser. No. 671,862 2 Claims. (Cl. 235-176) This inventionrelates to circuits for utilizing the nonlinearity of a capacitor orinductance to obtain binary manifestations, and by combinations of suchcircuits, obtain logical devices for employment in digital computers andthe like. From the detailed discussion of the invention that follows, itwill be appreciated that die invention may be practiced in a numbersystem having a base, or radix other than two, for example ternary,quaternary, quinary, etc, Reference is made to the U.S. patentapplication, Serial No. 426,149, of lohn Von Neumann, filed April 2S,1954, entitled Non-Linear Capacitance or Inductance Switching,Amplifying and Memory Organs, granted as Patent No. 2,815,488 onDecember 3, 1957 and of common assignee herewith.

The basic element necessary to the practice of applicants invention maybe any electromagnetic device possessing both capacitance and inductanceand therefore a resonant frequency for small oscillations about itsstate of equilibrium. Also, at least one of these two reactances must benon-linear. To excite this device there is provided a first amplitude'modulated periodic electrical vol-tage wave (or power supply) capable ofimpressing on the device a potential at a certain first or basicfrequency. There is also provided a second input (or control) signal ata second definite frequency. These two together will, under suitableconditions, elicit a particular type of response from this devicebecause of its non-linear nature in its non-dissipative `feature(namely, in its capacitance or in its inductance). This responseconsists of an output signal, which is then viewed in terms of itscomponent in a certain third frequency that may have to be isolated byfiltering. It should be noted that the second and the third frequencymay coincide and that either or both of them may coincide with the firstfrequency or with zero. lt is characteristic of this type of responsethat the complex amplitude of the output signal undergoes greatervariations than the complex amplitude of the second input (or control)signal. This is amplification. It may occur concurrently with orsubsequently to the presence of the second input (or control) signal-atany rate it will occur in a definite period of time, determined by thesubsequent amplitude modulation pattern of the first amplitude modulatedperiodic electrical voltage wave, or power supply. It may, for asuitable first wave amplitude modulation pattern, last, in its amplifiedform, beyond the duration of the second input (or control) signal. Inthis case it exhibits memory and hysteresis. By various superpositionarrangements affecting the first and -second input signals, all logicaland switching functions can be obtained. These arrangements, andincluding harmonic and subharmonic generation, will be discussed indetail hereinafter.

All these procedures, and in particular those in the cases of harmonicresponse and of subharmonic response, can be implemented by numerouselectromagnetic devices, many of them being solid state devices.

Among the solid state devices, the crystal diode, which possesses anon-linear capacitance, deserves special men'- tion. In addition to theusual advantages of solid state devices it exhibits especially highspeed-problably several 100, and up to 1000 times faster than thecorrespending use of conventional vacuum tubes. The afor'e` mentionedVon -Neumann patent discloses, as one: illustrative embodiment, anarrangement employing as the theme64 electromagnetic device a crystaldiode having a nonlinear capacitance.

Other solid state implementations are furnished by substances whosedielectric constant or magnetic permeability depend on theelectromagnetic field, thus providing for.

non-linear capacitances or inductances. Ferroelectric and ferromagneticsubstances are, in view of their saturation properties, examples ofthis.

Although the illustrative embodiments, set forth in detail hereinafter,employ as a power supply a one megacycle amplitude modulated sinevoltage wave and a .5 megacycle sine voltage wave as a control input, itwill readily be apparent that applicants invention may be practiced byemploying power and control inputs of much higher frequency, i.e., up toseveral 10,000 megacycles per second. These higher frequency embodimentsof applicauts invention will employ coaxial cables, waveguides, cavityresonators, very high frequency tubes such as klystrons, traveling wavetubes, magnetrons, and the like, as circuit components.

The primary object of this invention is the provision of a novelbistable, or binary, device embodying applicauts invention. The novelbistable device having greater speed, reliability, and being simpler toconstruct and operate, than those of the prior art.

A second object of this invention is the provision of an amplifier,embodying applicants invention, and being simple, reliable and stable inoperation.

A `further object of this invention is the provision of a novel memoryunit, embodying applicants invention, and being simple to construct andoperate, and having greater speed and reliability than those of theprior art.

A still further object of this invention is the provision of a novelsubharmonic generator embodying applicants invention.

Still another object of this invention is the provision of novelMAJORITY logical circuitry embodying applicants invention.

Still another object of this invention is the provision of novel O'R,AND, and MAJORITY circuits embodying applicants invention.

Yet another object of this invention is the provision vof-v novel binaryadders employing the novel OR, AND and MAJORITY circuits, or novelMAJORITY logical circuitry.

A still additional object is the attaining of any or all of thepreceding objects in a number system having a base, or radix, other thantwo. lFor example, a number system having a base, or radix 3, 4, 5 orhigher.

Other objects of the invention will be pointed out in the followingdescription and claims and illustrated in the accompanying drawings,which disclose, by way of example, the principle of the invention andthe best mode, which has been contemplated, of applying that principle.

The following description of an illustrative embodiment of applicantsinvention makes references to the drawings as follows:

FIG. 1 discloses how FIGS. 1A and 1B are to be joined to disclose indetail an illustrative circuit for practicing applicants invention. Theembodiment shown in com-` posite FIG. l may be employed as a bistableelement, a subharmonic generator, an amplifier, or a memory element;

FIG. 1A discloses a portion of the circuit of composite FIG. 1;

1B discloses a. portion of the circuit of composite a FIGS. 1D and 1E,joined as shown in FIG. 1C, disclose the time-phase relationship ofidealized voltage waveforms representative of a power input, a controlinput of Phase l, a subharmonic output of Phase l, a control input ofPhase 2 and a subharmonic output of Phase 2.

L The waveforms of FIG. 1C are referredin tlie'specifea tiifwit'lireference" tot'le circuitry 'FIGS. l, 2, 4, 6, 7, s, 9 and 10;

EIG, 1F. discloses waveforms similar to those. o f ijGS.

1D4 and 1'E,'b`ut yreducedvin scale and illustrati "g on arbbreyiatedtime base tberelationoi the powerfinput and 'T ."inpiits-tothesubharrnonic outputs' G 2f discloses how FIGS. 2A thro 21Ek are. to be A td disclose a circuit'or'comb sine voltage w'avefiput vwitli` 'a'one. kilocycl girafe, "siej voltage wave input toobta'in' as ano'utpi't, Ya singlertimervariant voltage Wavehavin'g as componentsthereof lafone megacycleg'sine voltage waveamplitude modulated with aone"kilocyclesqarelvoltage `wave.and af5..mgacycie sine'vo'ltage wave,and having 'aL predeterfy minedfpb'ase displacement between said one'megacycle vloltageA wave-and said .5 megacycle voltage wave;

i 2A discloses a portion of the circuit oY composite- EIG; 2i; FIG. 2Bdiscloses a portion of the circuit of composite EIGIVZ; Y

FIG',4 2C discloses. a portion of thecircuit of composite FIG.V 2D

FIG. l213 disclosesapportionoiV the?. circuit cico rnposite-1 FIG `3illustrates graphically the non-linear characteristiclllithel capacitorof. vthe,seriest'uned resonant circuit sliown in FIG.. 1B, Le., thevariationwi capacitance C,

w1 ii yrespect "to tliepoltential impfess'edlon .said capacitorl,

C. The capacitor Cl may" be afc'eramicf capacitorcom.

`age

FIG. lpdiscloses afblock representationrof adevice ,for

praI icing pplicantfs invention. ldevice p the llowing'characteristics: 1) binary manife (12)-ampliiication, and (3) memoryorlliysteresis;

` 4A"'dsclose`s"an alternative representation of the device' of FIG. il,Ifor practicing applicnts invention; Y

EIG.` 5 discloses ablock representation'f an inverter TIG.' 6 disclosesan embodiment, employing applicants invention, in the form of aMAJORITYcir'cuit, orMA- JQRITYJlovgical anfangement;- 4

WFIG.l 7 discloses/an` embodiment, employing: applicants` invention, inthe Vform' of an OR circuiti Spidiscloses an embodiment, employingapplicants invention, inthe form of anAND'cifrcui'tg' A' F1619disclosesfarienibodirnent, empioyinfg7 4, applicants.

inventioinj` in' forniv o'f. a binary adder;

FIGSI9A throu'gll 91, Vrespectivel'y,Y disclose voltage wavefdrmsfto beviewed in conjunction withv thefexpl'anaf.

tionfandexampleof operatim,y of binryadde'r of 5FIG. 1() discloses asecond embodimentv employing.

applicants invention, 'in the yform of a binary adder;

"FIGS IOAKthrough 10H, respectively, disclosevoltagev waveforms to beviewed in conjunctionwitn the eXp1analtion, andexampleiof operation, oftbebinary' adder of FIG. 1l disclosesachart illustratingsthef.exampleofoperation of the binary. -adienoff 9;;v i

FYG'IZ discloses, asemployed and occurring in aternary system, thetime-phase relationship of idealized voltfk elle@ newer, iena?! sCentral. input ef, that@ and a subharmonic output ot phase and` FIGS.12A andlZB', respectively', illustrate` graphically, in generalfom,'t'l3e non-linear'characteristic of a capacitor or inductor thatmayY be employed-'in practicing appli- Cantsiaveateain @ternary System,Itwill be apareca@ ed, that thenonlinear cliaracterstioof tneincluctance orA capacitance'en'flployed to. practice applicantsinvention is not limited tothe illustrative griaipiilsV-'of FICGS, 3,12A and; 12B. A Y Y Reference. is made to FIG; 2. Input 2 (FIG, 2A) haslimpressed thereon, an input, av 'one megacycle sinevoltage`v wave havinga peak voltage magnitude'of-appro-,xii mately .5 volts. input isimprossed via amplifier 4 (FIG/.24), squaringneworkno. i (rie. 2Aamprlier "3` (FING. ZAL), land squaringnnetwork No, 2` (HG1 2A);`onftheinput ofmampli'iijer No.6 (FI-G. 2A). output oi amplifier, No,6;'(FIjGgf2A):` is aA substantially square voltagewve at @frequencyof'fone megacycle. This; square wavev output 'ofjfmplilfier'NQ 6, isimpressed-on the Vinputnof'dieifentiating circuit No. 2v (HG, 2A)j andonfan Vinput olfm'odulating'. network No. l2 (FIG. 2B); Thel outputoffdilerentiatignetwork No. 2 (FIGQ 2A) isa serieso positive andnegative pulses that are, respectively, displalcedfin;tiniejbyonemicrosecond; The negative plses, (FIGyZBL "hat are ds'plasedjin. timelav-.011e niicroseicond," are eff tiyeV in; driving the multivibrator MV(BIG, 2B) whi rendersasnuarevoltage wave output atafreguencyofufSv-'megacycles- (ie, one microsecf o'ndduration positiveApulsefsdisplaeedgin time byY onemjcrosecond). y "It will ljevnotcdfromAFIG: ZVBItliat twooutputs,ndisplcedinphaseby 1866, are takenrfrom'thfemlfiribratoi "Ml/fail@ Trespeetively impressed Qn. the. gridsofcatliodefollowersNoY 1. (RIG. 2B) andv No. 2' (EIQIZB).nAssociated'withy each ot kthese catnodefolji lowerslisa'wayefslfiaping/network"(wave shaping: networks Nv.. 1 amine 2,.Heim-.that eliminare, of eters our.. the 4frez'l'uency componentso'ftheone megacycle square'pvltagewave ,top frenfderlsubstantially; avsinevoltage wave output Aata frequencyfofpSjrneacycles. The voltfy agsemerging fr Qm] v`are effectivelypuslx-pullsine-wavevoltages. A switch;S2u 2C)"is'lconn'ectedpsoas ,to permit the lpusli-pyull voltagesofveithefr dnebphas'eor the opposite pliaserto be impressedfupon the QtwoY i input terminals of phase-shift' network No. :IL (FIG. 2C); 'YItisfa characteristicof this type of phase-shift network, that ktheoutput voltage can befinade torvry iny phase by almost 18Owitlioutsignincantfc'hange's inYamplitudeV when tlievariable resistancefl?,s is'varied throughitls ralrige',V Tnefoutput of phase-shift network No. lisimpressedfontheinput of tuned ampli-V lier No. 3 (HG.Y I2C): from which*fal variable voltage outf put, i.e., magnitude, at a frequencyof-Smegacycles and harina a Sinatra/e' Shape is....btaines14. Tae SineVoltage :waveroutputtrom ltuned;amplier' blo. 3Y (FIG, 2C) is impressedjon the first'input Vofv'nnistingarnplier No. it) (FIG. 2E). Y M v YReference is made tQFIG'. 2D; Input No. 3' (FlG. 2D) mayhaveirnpressedthereon a one'kilocycle square wave voltage-wave; Itis toVbe apprecated-that-theone kilocycle frequency ismerelyan example of Vafrequency-` thatmay.been'uployed.l The actual frequency mayV be. l0()cycles perssecond to450kilocycles, for example.- Assume1 switch Sl-,isin its .fposition Rand a onekilocycle square,

voltage Awaveis impressed `onv Input .r-No.; 3, (FIG. 2D) z This onekilocyclesquare voltagewave is impressedviaam RC couplingnetwork..(FIG.` 2D) on theinput of integraty ing amplifier N o. 7 (FIGz.2D); The output .of integrating. ampliierNQJtisa triangularzshapedvoltagewave hav/flug..

the wave-shaping networks, therefore,4

a repetition rate of one kilocycle. This triangular shaped voltagewaveform is impressed on the input of a differential amplifier No. S(FIGI 2D) employing a triode V100. The output from the plate of triodeV100 is a triangular voltage wave which is approximately 180 out ofphase with respect to the triangular voltage wave output taken from thecathode of triode V100. It will now beapparent, from FIG. 2D, that withswitch S1 in its Position L, and a one kilocycle square voltage waveimpressed on input No. 3 (FIG. 2D) that the outputs of differentialamplifier No. 8 will be one kilocycle square voltage waves approximately180 out of phase with respect to each other. In the followingdiscussion, the square wave is used Vrather than Ithe triangular wave.The phase displaced square voltage wave outputs from the plate andcathode of triode V100 are, respectively, applied through a levelsetting circuit (FIG. 2D) to the grids of cathode followers No. 3 andNo. 4 (FIG. 2D). The outputs of cathode followers No. 3 and No. 4 are,respectively, square voltage waves having successive positive portionsof a duration of .5 millisecond; that is, the pulse repetition rate isapproximately one kilocycle. It will be appreciated, however, that theoutput of cathode follower No. 3 is 180 out of phase with respect to theoutput of cathode follower No. 4. The one megacycle square voltage waveoutput of amplifier No. 6 (FIG. 2A) and the phase displaced onekilocycle square voltage wave outputs of cathode followers No. 3 and No.4 are combined in modulating network 12 (FIG. 2D) to obtain an amplitudemodulated output voltage wave. This amplitude modulated output has anenvelope, as roughly shown in FIG. 2E, which includes periodic portionsof variating amplitude every .5 of a millisecond. The output ofmodulating network 12 is impressed .via lter 13 (FIG. 2E), and tunedamplifier No. 9 (FIG. 2E) on the input of cathode follower No. 5 (FIG.2E). The output of cathode follower No. 5 is a one megacycle sinevoltagewave that has been amplitude modulated with a one kilocyclesquare voltage wave. Variable output circuit 14 (FIG. 2E) is connectedbetween the output of cathode follower No. (FIG. 2E) and the secondinput of mixing amplifier No. (FIG. 2E).

As will be recalled, the lirst input of mixing amplifier 10 (FIG. 2E)has impressed thereon a .5 megacycle sine voltage wave, whereas thesecond input thereof, has impressed thereon a one megacycle sine voltagewave that has been amplitude modulated with a one kilocycle squarevoltage wave. The output ofmixing amplifier 10, appearing at output No.1 (FIG. 2E) is a periodic voltage wave havingthe following components: aone megacycle sine voltage wave amplitude modulated with la onekilocycle square voltage wave, and a .5 megacycle sine voltage wave.This periodic voltage wave, appearing at output No. 1 of 1116.213, isimpressed on input No. 1 of FIG. 1A.

As seen from FIG. 2C, switch S2 has two positions, .the rst position (U)of said switch eects the selection of push-pull voltage waves of onephase, generally of sine wave form, `at -a frequency of approximately .5megacycle. The second position (L) of switch S2 effects the selection ofpush-pull voltage waves, also generally of` sine wave form, and at afrequency of approximately .5 megacycle, but displaced in phase withrespect to the voltage waves selected -by said switch when in the rstposition by a phase angle of 180. Phase shift network No. 1 includescapacitor Cs (FIG. 2C) and the resistor RS (FIG. 2C) and vis connectedto switch S2 `as shown in FIG. 2C. This network is eiective in providinga variable phase shift of the voltage wave selected by said switch. Thephase shift effected by the phase shift network No. 1 (FIG. 2C)approaches 1180 degrees.

Reference is made to FIG. l. FIG. 1 includes amplifier No. 1 (FIG. 1A),a feedback amplifier No. Z (F-IG. 1A), a D.C. bias circuit (FIG. 1B) forthe non-linear capacitor C (FIG. 1B), inductance L (FIG. 1B) `and aswitching arrangement (FIG. lB) including switch S3 for feeding a signalto an oscilloscope (FIG. 1B). Output 1 (FIG. 2E)

put of ampliiier No. 1 (FIG. 1A) is the periodic voltageV wave havingthe following components: a one megacycle4 sine voltage wave amplitudemodulated with a one kilocycle square voltage wave and also a .5megacycle sine voltage wave having a peak amplitude of the order of 0.1%of the peak amplitude of the one megacycle ampli-vI tude modulatedvoltage wave. amplifier No. 1 (FIG. 1A) and feedback amplifier No. 2(FIG. 1A) is to generate an electrical voltage wave having a peakamplitude of approximately volts maximum. The output impedance offeedback amplifier No. 2 is of the order of 2. ohms. 'Ihe output offeedback amplier No. 2 is impressed on the non-linear capacitor C of thenonlinear network (FIG. lB). The non-linear capacitor C is connected inseries with an inductance L and this series circuit is tuned to resonateat 500 kilocycles for small oscillations. It is preferable to obtain asubstantially fixed value of L and then to employ a D C. biasing circuitto obtain the value of C. Reference is made to the D.C. biasing circuitshown in FIG. 1B and to the plot of D.C. volts impressed on capacitor Cversus the capacitance of capacitor C, as shown in FIG. 3.

Referring to FIG. 1B, it is seen that a legend states that a 40 voltpeak, or greater, of the envelope of the voltage wave impressed acrossthe L-C series circuit is necessary for applicants device to functionproperly. For this reason, the one megacycle sine voltage wave wasamplitude modulated with a one kilocycle square voltage wave. The natureof the tuned L-C circuit is such that an output (subharmonic) sinevoltage wave at a frequency of .5 megacycle is generated only when theenvelope of the (fundamental) one megacycle sine voltage wave, amplitudemodulated with a one kilocycle square voltage wave, has

periodic peak amplitudes that exceed a given critical volt-Y age. Themagnitude of this critical voltage depends upon the value of theparameters L and C, as well as the nature of the non-linearity of thecapacitor C, and upon the losses in the L-C circuit. The .5 megacyclesine voltage wave which is also impressed on input 1 (FIG. 1A) isintended to establish the desired phase of the output (subharmonic) sinevoltage wave at a frequency of .5 megacycles in the L-C circuit (FIG.1B). The subharmonic, i.e., output sine voltage wave at a frequency'of.5 megacycles, generated may have either one of two time-phase relationswith respect to the time-phase of the fundamental or power voltage wave.The phase of the subharmonic actually developed depends upon thetime-phase relationship of the small control (or stimulating) .5megacycle sine voltage wave input with respect to the timephase of thepower (or fundamental) voltage wave input. The control and power voltagewave inputs are respectively applied to input v1 (FIG. 1A), whereas theoutput subharmonic voltage wave will appear across the non-linearcapacitor C (FIG. 1B). Ifthe Voltage across the nonlinear network (FIG.lB) i.e., series circuit consisting of non-linear capacitor C andinductance L, is greater than 40 peak volts in magnitude, changing thephase of the .5 megacycle control input has no effect on the phase ofthe subharmonic output. Therefore, the fundamental or power input is anamplitude modulated one megacycle voltage wave. The power input isamplitude modulated in such a manner that the .5 megacycle control inputcanv reverse its phase during successive time-displaced time periodswhen the envelope of the one megacycle amplitudevi modulated power inputhas an amplitude of less `than 40 volts. All of the considerations ofthe time-phase rela-v tionship of the power input, the control input,and the sub# harmonic output will appear more clearly from a detaileddiscussion of idealized power, control, and output waveforms,hereinafter.

The switching arrangement of FIG. 1B employs switch S3 which has fourpositions numbered 1, 2, 3 and 4. The four positions of switch` S3,Vrespectively. accomplish the The primary function of' agees;

following: position 1f is'VV eective in conveyingto.4 theV oscilloscoperCFIG; 1B) a voltagesignal or-L waveform indicativefofethedrivingvoltage, ie., the outputV offfeetnA back-/amplier-No.- 2 (FIG.1A); position 2 isfeii'ectivein conveying a signal' tothewoscill'oscopethaty iszy indicative: ofk the-currentthroughtheL LFC circuit; position32 accomp *lishes1 substantially the-.samefunction asf position 1;; and,position-4- obtains a`I signal that-is indicativenofrthe chargevariation of theL-Cy circuit andconveys' this signalto theoscilloscope.

It` can b'e'sliowui, eitherA experimentally or theoretically, that-dnthepracticeof applicantsY invention there is an optimumphasedisplaernentbetween the one megacycle sine voltagewavethatisamplitude modulated withA a one liloeycle square volta-gewaveinput, and theY .5/ megacycle sine voltage wave input. The onernegacycle input willbe referred to asf-the-powerinput. The .5 megacycleinput will; be referredfto asV the Vcontrolinput. The .5 rnega/cle sinevoltagevwavve output will be referred to as the su'oharijnonic output'.vFurther,` the-novel devicefor practicing applicanltsinventiom may bereferred toas asubharrnonicV generator, a binary element, almernorydevice,- or a logical device.- ThisdeVice-wi-ll exhibit-memoryin--thatoncevthe desired subharmonic output is established; and thepower input is -not-interrupted and remains in magnitude abovethecri-tica-l level, thesubharrnonic output offlthe device willfremainunchanged regardless of`variations= in phase offthe control input.

Referencelismade to the typicalvoltage waveforms-of theepowerinput, thecontrol inputs, and thesubharmonio outputsasfshowrrinFlGSl 1D and lE.`The'phase-dis'; placement -angle-X rbetween the-power input and the-conutrolfinputo phaserl'and betweenftheipower:input andthecontrolinput of-phase-2` caribe arrived ,at experimentally,- o1-- theoreticallyvgenerally alongf the linefof approach set forth inl\7IcLacli1ans:teXtVonf Ordinary- Non-Linear'Dif-r ferential Equations,-' O'irford',- 1950.It is -vto beY noted from FIGS. 1D andl'E thatthephaseangle betweenthefcon= trol input of'phaseel' and the control input offphase 2? is:180"`V or -11-J radians;

Operation of theillustratvefembodiment of FIGS." I vand 2.

ReferringtoF-lGS: 2C andvZE, it willbeseenfthatwith.

switch SZ. in/its-'uppen position` acontrol input; of. phase l;generallyfhavingtm idealizediforirn'shown;in.FlG;. 1D, iseimpressed ontheeiirst. input (control) offmixing pli'erl of FlG;V 2E: The secondinput (power) of mix-1Y ingsamplierfw hasY impressed thereon; a powerinput; generally:oftheidealizedfoon-shown.in EIG. 1D; Under theseconditions,4 the output across the-nondinearscapacitor.

Cof-FIG'. 1B will have a-subharmonic componentfhaving anfanrplitude,considerably.: greaterxthan that. of the control input. The powerinput,4 control. inputv of phased. and subharnronic output across thenon-li`near vcapacitor-Cof. FIG;y 1B,.are=shownin idealizediforrnrin-FIG; 1C., It is tozbe appreciatedrthatthe `amplitude ofthe envelopefofthe power input may be considerablygreater, Le., amultiplein the orderof 1000, than the amplitude ofthecontrol input. Also, thearnplitude ofthe :subharmonic output Vis considerably greater thanthat of'thefcontrolinput.V Also,v the amplitude of the suhharmonic output acrossCiis conf.siderably greater than the-voltageacross C produced by the.w controlinput alone,.- in the absence of Ythe power input.l This characteristicof. thedevice is ,its amplification feature;- Still referring-Ito FIGS.1D andlE, it willbe seen-that vsubsequentto ythe-.application ofthe-power input. andfcontrol input for.` infinite-period oftime;,thefcoutrol input-may:beremoved(and/or reversed in phase) andthefsuoharmonic outputA appearingecrossfthe non-linearV capacitor-.CofFIG'.V lBwill remain., This feature of'appli! cants deviceillustrates`its memory ciiaracteristic.- (Reference is made to FIG. 1F).

Nowasurne-that switchSz ofFIG. 2C is inlits lower positionl ThenVimpressed oninput l (control) caf-mixingamplifierslll/willbeacontrolsinputof phase -2i' A conA trolvnput'olphasez Zi is shown. inideali'zedv formi 1D.. Wtlnaacontrolinput.ofphaseZtimplessedniupu 1g; ofmixingamplitier. ltkandf a powerinput irripresseifa on; inputgzo said'l amplienithefoutput.obtainedaeross: nous.: linearfcapacitor (1' of BIG. .113:willhave.-a-.subharmonicyfieef quencyrcoinponentigenerallyofthe;idealizedffornrlahell tl` SubharmoniczOutputof P hase 2-in HG;113.-, W power. inputand'controlinput of phase; 21: applicantl erfvice;A will` have: aniV amplifying,l characteristic... asy describecllabove'iwithzrespect to; acontrolinputof phase l; spondingly, withthecontrol. input ofephasef/ removed;t sugsequentfto.. thei application.of, an power inputandconv trol. input ofiphase'h. applicants devicewill.V exhibit a; memory characteristic;

The bistable: or; binary; characteristics ci;A applieanL-s; devicewillnow be. explained'. Letl itibe:assumedthan-- switch S2: ofLl-lG. 2C is'.ina itsvupper: positionf (u) and; hence la controllinput of. phase.y lis impressed on inpntf. 1f. of mixing amplicrnltl. Assumefalso thatazplower. input? is.. impressed on ,inputV Erz of; mixing: amplifier`10.1 "lherrj a,suhharmonic-ioutputioffphasesl will appearscream-norlinear capacitor CofrFlG. 1B. Nowitzwill wicca-1 de that ifthe control' input'v of -phaser l is; subsequently Les: moved,the-zsubharrnonic 4.output of. .phase l will continneilong as. the.magnitude4 of: the power: inputY remains above '.the;critical. voltage:level: Let; it'. be: assumed; that*s switch'rSzv of FIG. 2C. isinowplaced in its lou/.er1 posi tion;(L). Then-impressed on. inputZcfrnixingnrnplitieis 10will bea control input. ofphase 2L The: impressingascontrol input of:phase.22onapplicantsidevicef .vilhreb i11.the;o.utputacrossih'e :nonflinear -capacitorCof El havingA a subharrnonic-:output.ofphase 2,.` as.` viewed FlGl. 1D, provided.; thepowerf input: is.increased, from; less;thanzciitical'v to ,greaten than: critical'.voltage after.; the: application, of. the: control inputofphase-2.Eurtlier;the= subsequent removal ofv the-:control Ainputgof' phase:Zwilljf haveeno; effect .onvthis. output provided; the frnagnitudefof;tlieepower.zinput.` remains..above.tl1e.critical lleve'l; How-ff ever,if;'switch1.S2.(F lG. 2C) is .returnedto'.itsaupperfposie tion: (u)andi-a controleinput ofaphase. 11 isltherebyjjirn' pressed on.applicants-.devi then: the .outputacrossttheil uonelinear. capacitorCwillhave. asa: componenti-.a .subharmonicioutput ofphaseul, provided`'the-fpower. input ist increasedlfrornzlessithan. critical toaV greaterthan* criticalr voltagecafter; the: cont10l-.inputibeconies phase` 1..V

f momie-'ofthe .opposite-phase.

Discussion of'waveform lof FIG' 1F Referring Ito the waveforms of FIG.1F, Yit will;lle-.Snert`- from-'theitime scalepthat prior to.the..applicationuofnthei power input, a control-.input of phase 2. (are)is impressedt,I on applicants novel bistable device..V Then. upongiliefVimpressingo thepowerinput onsaid device, a-Subs-'- harmonicroutprutophaseZ-wvillbe generated. Furthen, from FIG.- 1E it will bcv seenthatwhen the'controlfinput. is removed andsubsequently a. control inputfof.phasel 17; (06) is impressed, but without'the powerinput.beinginterfruptedorfalling below the critical. levell in magnitudeizthe;subharrnonic output Willremain unchanged, Le., of-.pliaSe 2. Upon thepower input beingjnterrupted oir-falling belowI its criticalleveljinmagnitude,-. asgillustrated-inilfn 1F, a subharrnonicoutputwillnotbegenerated. Subsc@ quently, asishown` inzFlG. 1F, whenthe'powcrinputis` re-established,f. and acontrol input offphase-k 1 (00)havingA prior to this -f re-establisl'nnenty ofAv thepower.iriputvbleeuy impressedr on; thenovelf bistable device afsuhharrnonie so long as the power input is not interrupted and Vremainsin magnitude above its critical level. These features of the inventionhave been brought out earlier herein, but

are repeated for purposes of more fully explaining theoperation ofapplicants novel bistable device. The memory and ampliicationcharacteristics of applicants novel bistable device will also beapparent from the curves of FIG. 1F.

Further, it will be appreciated that due to space limitations, the phaserelationship of only a few cyclesof the power input, control input andsubharmonic output, are shown in FIG, 1F, `and that the sequence ofoperation illustrated in FIG. 1F is merely by way of example. Actually,the device could initially have impressed on it a control input of phase1 (00) and then upon the application of a power input, a subharmonicoutput ofphase l would be generated, and continue to be generated,-regardless of variations in the control input, until the power input wasinterrupted or fell below its critical magnitude,

level.

It will be apparent to those skilled in the art that manyl vReferring toFIG. 4A, it will be'seen. that the control input and power input arerespectively applied `through a' resistor to the input of an amplier.'The output of this amplifier is impressed on the input of a series-resonant circuit including an inductance L and a'l non-linear capacitorC. An output is taken from one end of the inductance L. This end of theinductance L is connected via a suitable resistor to ground. Merely forpurposes of explanation, the amplifier represented by a block in theembodiment of FIG. 4A may be thought of as comprising the mixing amplieril@ (FIG. 2E), amplifier No. 1 (FIG. 1A) and Ifeedback amplifier No. 2(FIG. 1A). It will then be seen that the resistors in the power inputlead and the control input lead of the representation of FIG. 4Acorrespond to the resistors in the first and second inputs of mixingamplifier of FIG. 2E. Further, the non-linear capacitor C and theinductance L of FIG. 4A may be thought of as corresponding to thenon-linearcapacitor C and inductance L of the series resonant circuit ofFIG. 1B. The resistor shown in FIG. 4A that is connected between one endof inductance L and ground may be thought of as corresponding to theresistor connected between contact No. 1 of switch S3 and ground asshown in FIG, 1B. The D.C. biasing circuit of FIG. 1B may be thought ofas being included in the amplifier represented by a block in FIG. 4A.

Applicant has disclosed an operative embodiment of his invention, but isyaware of the fact that the invention may be practiced with a widevariety of components. That is, the amplifier represented by the blockin FIG. 4A could be any one of a variety of types having suitablecharacteristics and specically a low output impedance. Further, thenon-linear capacitor` C and inductance L, comprising a series resonantcircuit, could be any one of a variety of types, specifically includinga series resonant circuit in which the inductance L has a non-linearcharacteristic. It will be appreciated by those skilled in the tart,that the resistor connected between the output of the series resonantcircuit of FIG. 4A and ground could be replaced by a capacitor having alarge capacitance compared to that of the non-linear capacitor C. Thishas two advantages, namely: first, the dissipation of the series tunedcircuit is reduced, and secondly, the ratio of subharmonic voltage tofundamental voltage is increased by virtue of the dilerence in impedanceof C to currents atsoV 1U the two frequencies. However, -in `theembodiments" 'cle-t scribed herein, it is apparent that I desire thesubharmonic output phase to be the same as that of thecontrol phase and,hence, an additional phase shift would have to be added somewhere in thecircuit.

Thus it will be apparent that the circuitry of FIGS. 2A

through 2E is actually auxiliary apparatus disclosed iny conjunctionwith applicants illustrative embodiment of his novel device for showinghow a suitable power input and first and second discrete control inputscan be obtained and controlled for practicing applicants invention. vIt"will be appreciated by those skilled in the art, that-appli` cantscontribution is in no way limited to the particular frequencies orcircuit arrangements shown herein.

It will be convenient hereinafter to employ a block symbol such as thatshown in FIG. 4 for applicants novel device as represented in FIG. 4A.Thus it will be appar# ent that when a suitable power input is impressedon the power input terminal of the device of FIG. 4, in conjunction'witha control input impressed on the control input terminal of the device ofFIG. 4, that an output will appear at the output terminal of saiddevice. Further, that this output will be determined by the mostrecently applied control input provided the magnitude of the power inputis increased from less than critical to greater than critical voltagesubsequent to the application of the most recent control input. p

Hereinafter, it will be convenient to refer to a control input, havingthe time phase relationship to a power input corresponding to that ofthe control input of phase lv shown in FIG. 1D, as a e@ input.Correspondingly, a con-4 trol input having the time phase relationshipgenerally hereinafter as an M input, will be employed in the dis-1cussion that follows. This M input will have a time phase relationshipwith respect to the power input, identical to that of a 6 input withrespect to the power input. It will be appreciated from the discussionthat follows that the M input may have an amplitude generally of thesame magnitude as that of the control inputs.

Inverter of FIG. 5

In the logical arrangements of applicants novel device,

it will be convenient to employ a suitable inverter. Brieily; thisinverter may consist of any device that will accept a periodic input ata 4first phase and render a periodic output, corresponding to saidperiodic input, but having its phase displaced with respect to saidfirst phase. That is, assuming a sine voltage wave input, the outputwill be a sine voltage wave having a phase displacement of 180 withrespect to the sine voltage wave input, It will be appreciated by thoseskilled in the art, that the frequency of the system will largelydetermine the type of inverter employed. Suitable inverters may includeelectronic arnplifiers, half wave length of coaxial cable, half wavelengthl of a Wave guide, half wave length of a parallel transmissionline and numerous other structures known to the art.

MAJORITY circuit of FIG. 6

Now referring to FIG. 6, there is disclosed a block diagramrepresentative of how applicants invention may be employed to functionas a MAJORITY circuit. Assume that a suitable power input is impressedon the power input terminal P of the device of FIG. 6, then the outputof the device of FIG. 6 will be either a 00 output or a 0 output,depending on whether the majority of the inputs impressed on inputterminals A, B and C of the device of FIG. 6 are of the 00 type or ofthe 0 type. In other words,

itl' ii. ailyftw,.or.; allthree, .of thethreeinputs totlzne.device-of.y6, are 0i the 00 type, a-.o outputwill result. Correrspondingly, if. anytwo, or all threeofthe, three inputsof: the;devic.e of FlG. 6 are o fthe 6 type, 21.0 output willy result. Thus, it will. be.- apparentthatgtheideviceoFIQ. 6.. will function as; a MAIQRITY circuit in a;logical arrangement employingsuitable.- control and power inputs.

R circuit of FIG'. 7'

l Now referring to, FiG. 7, there is disclosed a block` diagramrepresentative of how applicants inventionl may be employed to function.as an. OR circuit. Assume, that a. suitable power. input is impressed'on. theA power. input terminal P ofthe device of FIG. 7. Also, thatanVMinpuu i.e., an input having a time phase relationship of' 0 asd'efined.earlier herein, is impressed on input terminal MI ofl thedevice of FIG.7. (The control inputs and M inputs are essentially of the sameyamplitude.) Then, the followingA conditions will exist. If the inputs.impressed, on input:y terminals AA and B are, respectively,y a 00Yinputl and a 0 input, thenthe subharmonic output of, theV deviceot'gFIG. 7 will have a time phase relationshipztothe power input o f01,. This. will hereinafter be referred to asanoutput. of 9,.Correspondingly, if inputs A andB. haverespectively impressed thereon atu input and4 a 00 input,A a 0 output will result. Further, if theinputs A and' B of the device of FIG. 7 are alike, the output willcorrespondthereto. That is, if the inputs impressed Qu terminal A. and Bof FIG. 7 are each of the 0.0Ytyp ea 00 out-A put will result. A. 00output may be defined as 2:1.v s ubhar.- manic output having. a timephase relationship with. re.- spect to the power input correspondingy tothatA of' a- 00 input with respect to the power input. Correspondingly,when the inputs impressed on terminals A. and. B Oi the. OR circuit ofFIG. 7 are respectively ofthe 0 type,l a t?,r output will result. Thusit will be apparent that the. de-V vice. of' FIG. 7 will function as anOR. circuit in a logical arrangement employing suitable control, power,-and M' inputs..

It will be seen. that when input terminal A oi the. device of. FIG. 7has impressed thereonv a HO input, and; input terminal B of said devicehas impressed thereon a. 0, input, that these inputs effectively [sincethey arev of equal amplitude and displaced in phase 180] cancel and.

the. M input is eiective in rendering a @,output. Thus it will be.apparent thatv by employing an M input having a 00 time phaserelationship with respectto. thepower input, the OR circuit of FIG. 7functions so as to render a 00 output when a 60 input is impressed oneither input terminal A or input terminal B. or both, of the dev-ice ofFIG. 7.

AND circuit of FIG. 8

Now referring to FIG. 8, there is disclosed' a block.

diagram representative of applicants invention employed to function asan AND circuit. Assume that a suitable. power input is impressed on thepower input'terminal P of the device of FIG. 8. Also, assume that an Minput-is impressed on input terminal M ofthe deviceV ot'FI'G.I 8'. Itwill be recalled `from the earlier discussion ofthe M' input, that an Minput has a 0 time phase relationship to the power input. Further, asshown in FIG. 8, this M input is passed through an inverter prior tobeing impressed' via' a suitable resistor on the subharmonic generatorSG. Thus, it will be apparent that the output ofv` the-inverter of FIG.8 is an M1k input, namely, an input having a time phase relationship of60 with respect to the power input. Then the following conditions willexist. When the inputs impressed on input terminals A and B of thedeviceof FIG. 8 are-respectively 0@ inputs, a 0D output will result. Wheneither one of the inputs impressed on input termi"-` nalsfA and B is ainput, and the other inputis a 0 in.. put, the output of the device ofFIG, 8 will be al 00 output, Whenv the inputs impressed on inputterminals A and AB of the .device of FIG. 8 are each 0 inputs, then theoutput. of

saiddevicewill beaA 0, output. Thus, it willbefapparent'- 12 that; thecf. 8.. will'. inaction. as an, AND. circuit, inelogical.arrangement-,employing Suitable. Control', power; audM. inputs..

Numerous inoditicationsv ofA the above OR, AND and' MAIORIIY Circuitswill be, apparent to those skilled in. theart. A fewillustrativeyexamples of these modications; are-set tcrthhereiubelow:

(1)' A, higher frerplvency` power input and correspopdingly higherfrequency control and M inputs may bey enrplayed..

(E) Each of the devices shown in FIGS. 6 8 may havea greater number ofinputs than shown.

(3)l Anv input, having` a, 00 time, phasey relationship with respect to,the power. input may be employed;

(4) Any combination of. the above three listed variations: may beemployed in a singleY unit.

(5.) Themechancal Switches, shown in FIGS'- 1 end' 2 and in the binaryadders Of FIGS- 9 and 10, may '06, re' placed. by suitable electronicswitches known t9 the art.

(6.)y The. iuveutionmay be embodied. 0r practiced.; in' a ternary,Quaternary,l quinery or higher based Systemlt will b eapparent tov thoseskilled inthe art that at higher frequencies, circuit components such ascoaxial` cables, wavel guides., Cavity resonators, and non-lineardevices such ascrystal diodes, semi-conductor devices,A and the likenxeybe employed.-

Bz'nary adder of FIG.. 9.

FlG. 9/ discloses the logical arrangement- QfAND, OR and MAJORITYcircuits, generally of theafore-discussed type. to provide a binaryadder. The binary adder Cf 9 will, bedisclosedin conjunction with aneXample illustrating e mede 0f operation thereofs Reference is madetothe binary adder of Fl'G.- 9. and.' to, thewavetorms shown. inlIGS.-9A through 911 "fire, power input or. fundamental frequency represented'by waveforn,1 P1 of FIG. 9A is impressed on power input terminal El.of.' FIG. 9'. It will now be apparent that by the selective opening andclosing of switches Su, S12 and' S13 Wavetorm. P (FIG. 9B). wai/erom: P(EEG. 9C.) and? waveform P" (FlG. 9D) will' be respectively impressed"on thel power input terminal P of the following logical' devices of' thebinary adder of'FIG. 9: waveform P' is impressed on the power inputterminals P of the M'Afcircuit lili), the ORA circuit 101, and the AND;circuit 102', all shown in FIG. 9.; waveform P" is impressedv on. thepower input terminals P of AND circuit 1,03 and' AN'D circuit 1&4, bothshown in FIG. 9; waveform P"i s impressed on the power input terminal P-of 0R circuit 105' of'FIG. 9.

Let it now be assumed for purposes of explanation thatI in addition towaveformM (FIG.` 9E) being impressed' on input terminal M off the binaryadder oFiG. 9, that waveforms A, B and C (shown in FIGS. 9F, 9G 9H)` arerespectively impressed' on input terminals An, Bn and' Cn of'the binaryadder ofPIgG. 9. As will be seen from FIGS. 9A through 9J, therespective waveforms are all" sketched` to aY time base reading fromleft to right; Now let it he assumed' thatv the portions A1, A2, A3 andA4 of'V waveform A (FIG. 9F) respectively have the following; time phaserelationship to the power input P1: 00, 6 9.9, 05 that'the portions B1,B2, B3 and B4 of waveform B- (FIG. 9G) respectively have the followingtime phase relation: ship to the power input P1: 0 0m 60 and 6,7; and'that the portions C1, C2, C3 and C4 of waveform C (FIG. 9H)`respectively have the following time phase relationship with respect'tothe power input-P1z 0b, 60, 0m 0,. Their during time interval T1 to T2(shown withy respectto FIGSL 9A through 9 1) the h/IAIORiTYcircuit-.itin ofthe binary ad'deI-O'FIG. 9 will have a 60 inputimpressed on its input terminal A; a` 0,', input impressed on its inputterminal B and a 60 input impressed' on its input terminalC. This willresult in a 00 output from the MAJOIUTY circuit 100. This 0b output,from MAJORITY circuitv100, i9sI represented bythe portion D1 of'waveformD of. FIG.

